Carbon nanotubes in a race against time to replace silicon
Size refers to the dimensions of carbon nanotubes (CNTs) vs. the shrinking geometry of the components on today's silicon chips. A CNT is basically a tube whose wall is 1 carbon atom thick. The tube itself is 1 nanometer (nm, or one billionths of a meter, or one-thousandths of a micron) in diameter, although it can be tens of microns long. Although made of carbon, single-wall CNTs are excellent conductors thanks to quantum conductance, which allows electrons to propagate along the length of the tubes.
Time refers to the progression of Moore's Law, an observation by Intel co-founder Gordon Moore that the number of components on a chip can be expected to double every two years, without an increase in price. According to that, about more eight years from now silicon technology, which has reached 14nm geometry, will reach the atomic level. At that time, presumably the industry will no longer be able to uphold Moore's Law by making silicon components continually smaller.
Will CNTs, with their 1nm geometry, be ready by then
The main work on CNT technology for chip design is happening at Stanford University and IBM Research. Workers at both facilities are optimistic -- but guardedly so.
"We feel that CNTs have a chance to possibly replace silicon transistors sometime in the future -- if critical problems are solved," says Supratik Guha, director of physical sciences at IBM Research.
"I am hopeful that CNTs will be used one day," says Max Shulaker, a Stanford graduate student who serves as its spokesman for CNT research.
The problem of laying down chip circuits with CNTs that match the size of silicon components hasn't been solved, Guha notes. Since individual CNTs don't carry enough current for a functional transistor, five or six parallel tubes are required for one connection. The tubes must be laid 6nm or 7nm apart to minimize interference, but greater separation would waste space.
"Currently we are able to space them 100nm apart, so an order of magnitude improvement is needed," Guha says. "This is where we need some new thinking. With the current separation there is no advantage over silicon."
A silicon circuit that's more than 30nm wide isn't an issue, as metal traces in 14nm devices are about 50nm wide, notes semiconductor industry analyst Linley Gwennap, head of The Linley Group. "There is nothing in a 14nm process that actually measures 14nm," he says, adding that the fin, or main body, of an Intel transistor at the 14nm level measures 10nm.
IBM's Guha says he's also concerned about the purity of the CNT fibers. Circuit construction requires single-walled CNTs, while tubes with two or more walls have different electrical characteristics and their presence constitute impurities.
"We need to be 99.999% pure" -- in other words, requiring single-wall nanotubes -- "and now we are at 99.9%," says Guha. "We are getting there, and I am confident we will fix the problem."
Beyond that, Stanford's Shulaker says the main obstacle to the commercialization of CNTs is the need to improve their contact resistance, or in other words, their connectivity with other conductors used in the system, like silicon and copper. The connection points are tiny and therefore create electrical resistance that requires additional voltage to overcome and operate the system, he explains. The issue is also present with silicon, but silicon designers have been working on solutions for decades, he adds.
Shulaker also sees the need for better "doping" of the CNTs that are to be used as transistors. Doping is the intentional introduction of certain impurities to control the item's electrical properties so it can function as a transistor.
"It took years to refine doping with silicon," says Shulaker. "With CNTs we are at the stage where silicon was when it started."
The problem with potential silicon replacement technologies like CNT "is that you can do pretty cool things in the lab with them. But putting billions of them on a chip and trying to crank out millions of chips per month is a different problem. CNTs looks promising in the lab, but they must solve the problem of building them in a production environment," says Gwennap.
But solving CNT's various problems must happen within a specific time frame or the technology may as well be dropped as far as semiconductor progress is concerned.
With chip technology now at the 14nm level, in two years it will reach the 10nm level, and in four years the 7nm level, and then maybe the 5nm level in six years, Guha explains. But 5nm is about the width of 20 silicon atoms, so shrinking dimensions lower than 5nm may be difficult, barring the discovery of some way to manipulate individual atoms.
"We have another maybe three generations of technology left -- maybe four if you are really optimistic. After that improvements in silicon will cease," predicts Guha.
CNTs, of course, are at the 1nm level. But for the industry to adopt the technology, its problems must be resolved in time for planners to add it to their production road maps; before they make chips, they have to build factories.
Consequently, "we need to demonstrate the practicality of CNT technology in the next two to three years, or the window of opportunity will close and the technology will not be there when needed," says Guha.
If the problems can be solved, "We could see commercial products in six or seven years, at the earliest," Guha says. "Or development could drag on for a decade, or the technology may never become economical."
"At this point it looks like standard [silicon] transistors are solid enough to last to at least 7nm and perhaps 5nm," agrees Gwennap. "CNTs could come into production in six to eight years, maybe, which is pretty far out, but it's on a list of things people are looking at to replace standard transistors."
Not everyone believes it's possible to get there in time. "I don't see CNTs in under seven years, and even 10 years is farfetched," says David Kanter, senior editor at The Linley Group's Microprocessor Report. "What will be in production two to four years from now has already been selected, and anyone who claims to see further than 10 years ahead is not credible, to use the G-rated way of saying it," he adds.
For all its problems, the compass continues pointing toward CNT technology as a possible way to keep up with Moore's Law -- assuming no way is found to make ever-smaller silicon components.
"To make transistors you need a material with three things," says Shulaker at Stanford. The material needs a band gap -- an energy range within which electricity can't be conducted -- so that the circuit can be turned on and off. The band gap needs to be just the right size; too large and the material is an insulator, too small and it's a metal.
"CNTs have one just the right size," Shulaker says. Finally, the material needs to be thin since you want to make the circuits small. And it needs to be a very good conductor.
"There are not many materials with all three properties," he notes.
Another factor is that "any new technology needs to be mindful that silicon has dominated the industry for decades, and billions have been invested in the infrastructure. But CNTs are 100% compatible with silicon, as you can build them on a silicon substrate," Shulaker says.
Shulaker adds that CNTs can actually be superior to silicon in that a layer of CNT circuitry can be added to an existing silicon device, since the process requires applying heat at 120 degrees centigrade. Adding a layer of silicon would require 900 degrees centigrade, which would destroy the original layer.
"Huge amounts of energy are wasted in computers moving data from memory to the processor, but monolithic integrated 3D [chips], with transistors and memory stacked directly on top of each other, would give huge performance benefits," he says.
"You could build a whole computer on a dime. Beyond better transistors you would get brand-new types of systems; it could lead to a whole new world," Shulaker says.
"I am hopeful that CNTs will be used someday," he adds. "It does not need to replace silicon, it can be built atop silicon, and therefore it doesn't need to do everything at once."
Gwennap likens the generation-by-generation development of chip technology to driving down a dark road at night, where only what is in the range of the car's headlights can be seen.
"I can see 10nm, I can see 7 pretty well, and I hear 5nm is pretty solid, but nobody knows what happens after that," Gwennap notes. "Below 5nm it seems like it has to stop somewhere, but I am skeptical of saying that since I have heard others say it, and I have said it myself over the past 20 years, that we can't get below a certain size. But CNTs can only be 1nm, and if silicon gets below that it obviates the need for CNTs," says Gwennap.
"But we have been in this situation for decades, where we can't see more than five years out," he adds. "Somehow, here we are."