Intel eyes a path to get back in line with Moore's Law

The company hasn't kept up with its own deadlines to advance chip technology and has dealt with embarrassing product delays. In recent years, Intel hasn't been able to advance the chip manufacturing process on a regular two-year cycle, a schedule it had in place for decades.

After encountering challenges involved in making teenier chips, Intel is now advancing the chip manufacturing process every two and a half years. It did so with its current 14-nanometer manufacturing process, and is expected to do so with its upcoming 10-nm process, Stacy Smith, chief financial officer, said during a speech this week at the Morgan Stanley Technology, Media and Telecom Conference.

But Intel hopes to end the half-year lapse at the upcoming 7-nm process, when it hopes to return to advancing chip manufacturing every two years, Smith said.

"We would like to be at two years, but we're not," Smith said. "We're just watching 7-nm as being the potential time where there's a technology shift that might allow us to get back to the two-year cadence."

Intel has based its chip manufacturing advancements on an observation called Moore's Law, which states that the density of transistors should double every two years while cost per transistor declines. Intel's goal is to get back in line with Moore's Law, which served the company well for decades.

Manufacturing issues during the 14-nm process led to Intel slowing chip manufacturing advancements to a 2.5-year time frame. That led to product delays and wholesale changes in chip release plans.

One issue: Intel typically releases two chip architectures with one manufacturing process, but for the first time will release three with the 14-nanometer process. Intel has released chips code-named Broadwell and Skylake, and later this year will release chips code-named Kaby Lake.

The first chips based on the 10-nanometer process, code-named Cannonlake, will come in the second half of 2017.

Returning to the Moore's Law schedule hinges on a new technology called EUV (extreme ultraviolet lithography), which eliminates some of the complexity associated with making smaller chips.

EUV could come into action with the 7-nm process. The technology uses ultraviolet light to transfer circuit patterns on silicon wafers using masks. EUV can't be used now because the tools don't exist.

As chips get smaller, the chance of errors in the manufacturing process also increases. Current techniques like multipatterning lithography -- used in Intel's 14-nm process -- do not allow Intel to further reduce chip sizes, Smith said.

It's possible that EUV tools will be ready earlier than expected so they can be implemented in the 10-nm process, but Intel isn't planning for that yet, Smith said.

Intel has lost the manufacturing advantage it had over rivals Samsung, TSMC and GlobalFoundries, but a move to the 10-nm process should put it on top again. Samsung and GlobalFoundries are now making 14-nm chips and haven't shared plans to advance chip manufacturing processes.

For Intel, keeping up with Moore’s Law and two-year manufacturing advances is expensive. The chip maker in 2015 estimated it would need to spend US$270 billion over a 10-year period on manufacturing and development, up from an estimated $104 billion in 2011. The estimate includes the cost of wafers, manpower and tools like EUV.

Beyond EUV, advances in materials could help Intel produce faster and more power-efficient chips. Intel has floated the idea of using GaN (gallium nitride) to partly replace silicon on chips. GaN is a better conductor of electricity and performs much faster than silicon, and it could initially be used in power regulators and other components.