Bit by bit, Intel looks to quadruple SSD storage

One effort underway at is to stuff more bits in a single cell, which could increase data storage capacity in mobile devices and PCs by as much as fourfold. Intel is trying to cram four bits in a storage cell, an improvement over the three bits that can be put in a single storage cell currently.

"This could enable denser devices in a broad range of mobile and compute applications," said Bill Leszinske, vice president of strategic planning and marketing for non-volatile memory solutions at Intel, in an email.

There is an insatiable demand for more storage. Apps and OSes are getting bigger, 4K video is going mainstream, and more information is being generated by sensors and other data sources. Thus, mobile device and PC makers are continuously trying to raise the capacity of flash drives and SSDs in devices.

By putting four bits per cell, a technique Intel calls QLC (quad-level cell), the capacity of SSDs could balloon to more than 10TB on standard 2.5-inch drives. Intel said QLC is still under research, and didn't provide a timeline for the release of flash chips based on the technology.

SSDs, which are built on NAND flash, are faster and more power-efficient than hard drives, but their capacity today tops out at roughly 4TB. SanDisk plans to ship 8TB SSDs, which would match the highest-capacity hard drive from Seagate. Intel has said it could raise the capacity of SSDs to 10TB or more with the new triple-level cell (TLC) flash chips it announced with Micron last week.

Adding more capacity to SSDs is an ongoing challenge as the geometry of chips gets smaller, and Intel's technique is one way to expand the life of flash storage, which will likely run its course by 2023, said Jim Handy, an analyst at Objective Analysis.

Flash storage will likely be replaced within the next decade by emerging technologies such as MRAM (magneto-resistive RAM), PCM (phase-change memory) and RRAM (resistive RAM), which are just entering the market, Handy said.

Intel's ability to put four bits in a cell is tied to the company's ability to scale down the size of flash chips via its latest 3D NAND manufacturing technology. The technology allows layers of storage cells to be placed vertically, much like a skyscraper, allowing for more capacity.

Most SSDs come with one bit per storage cell, called SLC (single-level cell), or two bits per cell, also called multilevel cell. Putting three bits in a cell is challenging enough, and Handy was skeptical about achieving four-bit storage cells, saying the technology could open the possibility for more data errors in SSDs.

Each time one more bit is added to a cell, there is more interference, which could make it harder to discern data from a cell.

"The expectation for digital data is that it's 100 percent there or useless," Handy said.

Moreover, this isn't the first time a company has tried to cram four bits in a cell. M-Systems tried the same close to a decade ago, but failed. SanDisk ultimately acquired M-Systems in 2006.

Additionally, there isn't much incentive to put four bits per cell because of cost issues. It's possible to cut the cost of a flash chip in half by putting two bits in a cell, and by 30 percent by putting three bits in a cell. The savings could diminish to 15 percent when putting four bits per cell, according to Handy's estimates.

But Intel's Leszinske remained cautiously optimistic about the company's chances with QLC, saying Intel's 3D NAND technology has high capacitance and low interference, making quad-level cell "a real opportunity."

Agam Shah covers PCs, tablets, servers, chips and semiconductors for IDG News Service. Follow Agam on Twitter at @agamsh. Agam's e-mail address is agam_shah@idg.com