Mobile storage about to balloon with new 3D flash chips from Intel and Micron

With the 3D NAND chips, which started shipping Thursday, solid-state drives with more than 10TB of storage are just around the corner, said Brian Shirley, vice president of memory and technology solutions at Micron.

For high-end tablets or lightweight laptops, the flash chips could be combined into gumstick-sized SSDs with more than 3.5TB of capacity. In smartphones, the new chips could let manufacturers double or triple capacity without raising prices. The maximum storage capacity in handsets today is 128GB.

People will always need more storage because file sizes keep growing and people still store videos and music locally, Shirley said. The flash chips should also increase the performance and reliability of smartphones, PCs and servers, he said.

SSDs are faster and more power-efficient than hard drives, but their capacity tops out at roughly 3.2TB to 4TB. The highest capacity SSDs typically go into high-end desktops, servers and storage arrays. SanDisk has announced plans to ship 8TB SSDs, which would match the highest-capacity hard drive from Seagate.

SSDs are relatively expensive compared to hard drives, but prices of SSDs are coming down by up to 25 percent every year, and the 3D NAND technology will give users more storage capacity at the same price, Shirley said.

Micron, which sells flash drives, will start selling large-capacity SSDs based on the new chips starting in the second half the year. Intel will implement the new technology across its lineup of consumer and enterprise SSDs, but the chip maker didn't provide a time frame.

The new flash chips are markedly different from conventional NAND flash, in which storage cells are placed side by side. Intel and Micron advanced the design by packing storage cells vertically, like a skyscraper, allowing higher capacity.

Stacking the cells reduces the distance needed to communicate between them, enabling faster data transfers. Intel and Micron executives see the new flash playing a key role in long- and short-term storage in data centers, as well as data caching.

In a standard chip package, Intel and Micron stacked flash cells vertically in 32 layers to achieve 256-gigabit multilevel cell (MLC) density, in which there are two bits per cell, and 384-gigabit triple-level cell (TLC) density, in which there are three bits per cell.

To achieve a 3.8TB gum-stick sized SSD, the companies can combine five 768GB 3D NAND flash chips. Each chip would have 16 levels of 384-gigabit TLC flash, which combines to 6,144-gigabits, or 768GB capacity of total flash storage per chip.

Intel is not the first to stack cells; Samsung started doing it in 2013. Intel said it has managed to cram more storage into smaller packages with an underlying mechanism called floating gate, while Samsung uses technology called trap-charge.

The companies will continue to cram more bits into cells in an effort to offer more storage in mobile devices, PCs and servers. Intel and Micron are researching new techniques to cram four bits per cell.

The 256-gigabit MLC flash storage is shipping to testers, while the 384Gb TLC version will ship to testers in a few months. Mass production of both flash chips will begin in the fourth quarter this year.

Agam Shah covers PCs, tablets, servers, chips and semiconductors for IDG News Service. Follow Agam on Twitter at @agamsh. Agam's e-mail address is agam_shah@idg.com